International Conference on Field Programmable Technology Best Paper Awards

  • A. Yan, S.J.E. Wilton, "Product Term Embedded Synthesizable Logic Cores'', Proc. International Conference on Field-Programmable Technology, pp. 162-169, 2003.
  • G. Lemieux, E. Lee, M. Tom, and A. Yu, "Directional and Single-Driver Wires in FPGA Interconnect'', Proc. International Conference on Field-Programmable Technology, pp. 41-48, 2004.
  • C.T. Chow, L.S.M. Tsui, P.H.W. Leong, W. Luk, and S. Wilton. "Dynamic voltage scaling for commercial FPGA'', Proc. International Conference on Field Programmable Technology, pp. 173-180, 2005.
  • D. Ziener and J. Teich, "FPGA core watermarking based on power signature analysis'', Proc. International Conference on Field-Programmable Technology, pp.205-212, 2006.
  • S. Chin and S.J.E. Wilton, "Memory Footprint Reduction For FPGA Routing Algorithms'', Proc. International Conference on Field-Programmable Technology, pp.1-8, 2007.
  • H. Fu, O. Mencer and W. Luk, "Optimizing Residue Arithmetic on FPGAs'', Proc. International Conference on Field-Programmable Technology, pp.41-48, 2008.
  • X. Tian and K. Benkrid, "American Option Pricing on Reconfigurable Hardware Using Least-Squares Monte Carlo Method'', Proc. International Conference on Field-Programmable Technology, pp.263-270, 2009.
  • S. Birk, J.G. Steffan, J.H. Anderson, "Parallelizing FPGA placement using transactional memory," IEEE International Conference on Field Programmable Technology (FPT), pp. 61-69, Beijing, China, 2010.
  • N. Kapre and A. DeHon, "VLIW-SCORE: Beyond C for Sequential Control of SPICE FPGA Acceleration," IEEE International Conference on Field Programmable Technology (FPT), India, 2011.
  • Liang Chen and Tulika Mitra, "Graph Minor Approach for Application Mapping on CGRAs", IEEE International Conference on Field Programmable Technology (FPT), Seoul, 2012.
  • Hui Yan Cheah, Suhaib Fahmy, Douglas L. Maskell, "iDEA: A DSP Block Based FPGA Soft Processor", IEEE International Conference on Field Programmable Technology (FPT), Seoul, 2012.
  • Eddie Hung, Al-Shahna Jamal, S.J.E. Wilton, "Maximum Flow Algorithms for Maximum Observability During FPGA Debug", IEEE International Conference on Field Programmable Technology (FPT), Kyoto, 2013.
  • Marcel Gort and Jason Anderson, "Design Re-Use for Compile Time Reduction in FPGA High-Level Synthesis Flows", International Conference on Field Programmable Technology (FPT), Shanghai, 2014.
  • Hyunseok Park, Shreel Vijayvargiya, and Andre DeHon, "Energy Minimization in the Time-Space Continuum", International Conference on Field Programmable Technology (FPT), Queenstown, 2015.
  • Kosuke Tatsumura, Sadegh Yazdanshenas and Vaughn Betz, "High Density, Low Energy, Magnetic Tunnel Junction Based Block RAMs for Memory-rich FPGAs", International Conference on Field Programmable Technology (FPT), Xian, 2016
  • Shaoyi Cheng, Qijing Huang, and John Wawrzynek, "Synthesis of Program Binaries into FPGA Accelerators with Runtime Dependence Validation", International Conference on Field Programmable Technology (FPT), Melbourne, 2017
  • Kota Ando, Kodai Ueyoshi, Yuka Oba, Kazutoshi Hirose, Ryota Uematsu, Takumi Kudo, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki and Masato Motomura, "Dither NN: An Accurate Neural Network with Dithering for Low Bit-Precision Hardware", pp. 6-13, 2018 (doi: 10.1109/FPT.2018.00013).
  • Long Chung Chan, Gurshaant Malik and Nachiket Kapre, "Partitioning FPGA-Optimized Systolic Arrays for Fun and Profit", pp. 144-152, 2019 (doi: 10.1109/ICFPT47387.2019.00025).
  • Thiem Van Chu, Ryuichi Kitajima, Kazushi Kawamura, Jaehoon Yu and Masato Motomura, "A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning", 2021 (doi: 10.1109/ICFPT52863.2021.9609699).